I see you've gone back and forth a bit, so let me just make a comment which may or may not help.
In general you don't write loops inside make recipes, because make itself provides "looping". So when you write a rule like:
all: app1 app2 app3 app4
make will try to build each one of those prerequisites, one at a time. So if you wanted to have a makefile that echoed a line for each entry in the apps
variable you would do it like this:
all: $(apps)
$(apps):
@echo $@
This tells make to start with a target all
and try to "build" each of its prerequisites which are the values in the apps
variable.
Then you define a rule for how to build the apps, and for each one you say that the rule is echo $@
where $@
is an automatic variable that expands to the currently-building target.
In make, the syntax:
foo bar biz:
some command
is shorthand for, and identical to, writing:
foo:
some command
bar:
some command
biz:
some command
The crucial thing when writing makefiles is that you think how to write a rule to create one file (target) from zero or more prerequisite files. Then you let make worry about how to connect all those prerequisites together and order them properly.
ETA
If you want a special rule for one particular target in a long list held in the $(apps)
variable, you can do this:
$(filter-out bar,$(apps)):
@echo print $@
bar:
some other command
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